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A performance-efficient and datapath-regular implementation of modified split-radix fast Fourier transform

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成果类型:
期刊论文、会议论文
作者:
Zheng, Weihua;Xiao, Shenping;Li, Kenli;Li, Keqin;Jiang, Weijin*
通讯作者:
Jiang, Weijin
作者机构:
[Zheng, Weihua; Xiao, Shenping] Hunan Univ Technol, Coll Elect & Informat Engn, Zhouzhou, Peoples R China.
[Li, Keqin; Zheng, Weihua; Li, Kenli] Hunan Univ, Coll Informat Sci & Engn, Changsha, Hunan, Peoples R China.
[Li, Keqin] SUNY Coll New Paltz, Dept Comp Sci, New Paltz, NY USA.
[Jiang, Weijin] Hunan Univ Commerce, Sch Comp & Informat Engn, Changsha 410205, Hunan, Peoples R China.
通讯机构:
[Jiang, Weijin] Hunan Univ Commerce, Sch Comp & Informat Engn, Changsha 410205, Hunan, Peoples R China.
语种:
英文
关键词:
Fast Fourier transform (FFT);general processing unit (GPU) parallelism;modified split-radix (MSR);split-radix (SR)
期刊:
JOURNAL OF INTELLIGENT & FUZZY SYSTEMS
ISSN:
1064-1246
年:
2016
卷:
31
期:
2
页码:
957-965
会议名称:
11th International Conference on Natural Computation (ICNC) / 12th International Conference on Fuzzy Systems and Knowledge Discovery (FSKD)
会议时间:
AUG 15-17, 2015
会议地点:
Zhangjiajie, PEOPLES R CHINA
会议主办单位:
[Zheng, Weihua;Xiao, Shenping] Hunan Univ Technol, Coll Elect & Informat Engn, Zhouzhou, Peoples R China.^[Zheng, Weihua;Li, Kenli;Li, Keqin] Hunan Univ, Coll Informat Sci & Engn, Changsha, Hunan, Peoples R China.^[Li, Keqin] SUNY Coll New Paltz, Dept Comp Sci, New Paltz, NY USA.^[Jiang, Weijin] Hunan Univ Commerce, Sch Comp & Informat Engn, Changsha 410205, Hunan, Peoples R China.
会议赞助商:
IEEE, IEEE Circuits & Syst Soc, Hunan Univ, Jishou Univ
出版地:
NIEUWE HEMWEG 6B, 1013 BG AMSTERDAM, NETHERLANDS
出版者:
IOS PRESS
文献类别:
WOS:Article;Proceedings Paper
所属学科:
ESI学科类别:计算机科学;WOS学科类别:Computer Science, Artificial Intelligence
入藏号:
机构署名:
本校为第一机构
院系归属:
电气与信息工程学院
摘要:
Discrete Fourier transform (DFT) finds various applications in signal processing, image processing, artificial intelligent, and fuzzy logic etc. DFT is often computed efficiently with Fast Fourier transform (FF1). The modified split radix FFT (MSRFET.) algorithm implements a length-N=2(m) DFT achieving a reduction of arithmetic complexity compared to split-radix FF1 (SRFFT). In this paper, a simplified algorithm is proposed for the MSRFFT algorithm, reducing the number of real coefficients evaluated from 5/8N - 2 to 15/32N - 2 and the number of groups of decomposition from 4 to 3. A implementation approach is also presented. The approach makes data-path of the MSRFFT regular similar to that of the radix-2 FFT algorithm. The experimental results show that (1) MSRFFT consumes less time on central processing units (CPUs) with sufficient cache than existing algorithms; (2) the proposed implementation method can save execution time on CPUs and general processing units (GPUs).
参考文献:
Bouguezel S, 2004, IEEE T CIRCUITS-I, V51, P1723, DOI 10.1109/TCSI.2004.834508
Bowers KJ, 2010, IEEE T SIGNAL PROCES, V58, P1122, DOI 10.1109/TSP.2009.2035984
Buck I, 2004, ACM T GRAPHIC, V23, P777, DOI 10.1145/1015706.1015800
COOLEY JW, 1965, MATH COMPUT, V19, P297, DOI 10.2307/2003354
DUHAMEL P, 1984, ELECTRON LETT, V20, P14, DOI 10.1049/el:19840012

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